Update layout Hardware V00I

Finally time to update the layout.  The charging circuit works well and I changed the level shifter on the schematic last week. So this week, I updated the layout.

I started by generating a new netlist. Next, I ran CvPCB to verify all the parts had footprints associated with them. They all do. Next I ran PCBnew and imported the netlist; making sure the exchange footprint settins was set to change.  I got an error:

Error: Component 'U3' pad '~' not found in footprint 'Housings_SSOP:TSSOP-20_4.4x6.5mm_Pitch0.65mm'

I had to figure out what that means before moving on.  It suggest one of the pins was named wrong either in the schematic symbol or the footprint library. I checked the schematic symbol first. I noticed the GND pin didn’t have a pin number assigned to it. Easy fix, added it and updated the library. I set the GND pin number to 11, saved it to the library, made sure it was in the schematic correctly, and re-generated the netlist.  I had to delete it and re-place it into the schematic to correct the schematic.  This meant that CvPCB no longer knew the footprint to use, so I updated it and re-generated the netlist again. No more errors in PCBnew import of the netlist.

I started by ripping up the unconnected traces. Then I started placing footprints.  I hid the bottom layer to make it easier to see what I was working around on the top layer.  Once I had the parts placed, I started routing traces.  I had to adjust component placement a few times to get everything to fit.  As I got to a point that I couldn’t do all the traces on the top side of the board, I un-hid the bottom layer.  While I was working with both sides, I had to re-fill the zones several times to correct for the areas I added new traces on the bottom side.

I finally got to 0 unconnected nets. I did a quick look to make sure all the references were readable and not under other parts.


I plotted out the Gerber files and did a quick check to see if it looked OK and got ready to order.  When I look at Gerbers, I am looking for broken traces and unintentionally connected traces.  I used Gerbview to do this check. As I went into Gerbview and tried to load the files, the were double of all the files.  It looks like the developers of KiCad decided to change the naming conventions  for output to gerber.  I went in and deleted all the files in that folder and re-ran the plots.  While looking at the gerber files, C10 and U3 references were covered up.  I went in and fixed them and re-plotted.  While I was at it, I discovered U10 wasn’t anywhere near it’s footprint.

I created a zip file with the plot files ready to upload to a fabrication house. I have uploaded the files to the github repository, click the hardware link in the right column to go get it.

Are you using Kicad?  What tools are you using to design in?  Do you have trouble finding datasheets for Chinese parts?

New PCBs

The PCBs arrived this week.  I really like the way my Logo came out.  20160415BarePCB

I do want to make an adjustment, make the arrows larger, they didn’t even show up on the silkscreen.


To start testing, I put a jumper in bypassing the lithium cell charger. I then installed the ESP-12E, the SPI RAM, The Crystal, the USB Serial Bridge, the voltage regulator, and the USB connector. Just enough to power up, load a program and test the basics.


First test was to  connect to PC and run ESPlorer– it worked.

I got a message:

AT-based firmware detected.
AT version: 8 2015 14:45:58)
SDK version:1.3.0
Ai-Thinker Technology Co.,Ltd.
Build: Sep 11 2015 11:48:04

I then tried to install my test version of the software and it wouldn’t install.  I went back to ESPlorer and started playing with the DTR and RTS to see what would happen. It turns out I got DTR and RTS backwards. So I cut the traces and added a couple of jumpers. This is the kind of mistake I was hoping to catch in the design review.

It programmed great with the wires swapped. My code crashed, back to a “Hello World” version.

Turns out the internal memory chip installed on the ESP-12E does not run at the settings I had specified with esptool.py.  I found this out by setting it to 20MHz DIO mode which started working. I then switched it to QIO mode to see what happened. QIO worked, next I tried running at 40 MHz. That worked.

../esptool/esptool.py --port /dev/ttyUSB0 --baud 230400 write_flash -ff 40m -fm qio -fs 32m 0x00000 ../bin/eagle.flash.bin 0x40000 ../bin/eagle.irom0text.bin

I enabled HSPI Overlap mode by adding spiRamInit() to the end user_init(). Ran without crashing. When I started building for use, I discovered no SPI Master Read available.  I saw something that looked correct for slave read, so I borrowed a line from it and did a write followed by that line– it built. I uploaded the code, and it ran, still no testing of the SPI Ram.

I added the function calls to write “Hello World” to the SPI RAM. and read back and put out to the console. and I got garbage back to the console.  Not a surprise. Debugging with a logic analyzer next week.

Have you written code for the ESP8266. Have you worked with SPI before? I would love to Hear from you.


Initial Connections

As I start connecting signals on the schematic, I look at which pins have dedicated functions.  The dedicated functions I need, I handle first.  This allows me to adjust the rest of the design around the required elements.  To make the schematic easier to read, I try to avoid crossing traces.

I went into the library editor and moved the pins of the ESP-12E around to make it easier to read the schematic.

I have connected the SPI pins from the ESP-12E to the level shifter chips.  I have also connected four GPIO pins to the level shifter chips.   I have placed the 3.3V power connections to each of the level shifter chips and the ESP-12E. I have also tied the 3.3V regulator to the 3.3V power bus. I connected GPIO0, GPIO2, GPIO4, GPIO5 to the direction pins of the level shifter chips.  I have also connected Vt to the level shifter chips. this voltage will come from the target to be programmed.

I have ordered 5 ESP-12E boards from Ebay.  I should receive them within 30 days.  Once I receive them, I will start doing a basic hello world project.

Initial Connections

KiCad EDA tools

I have never used the KiCad toolset.   The schematic capture tool I am familiar with is an older version of OrCad.  The industry tools have changed a lot, I expect a steep learning curve.

KiCad is open source, and free to use.  I will be posting my schematics, layout files, and new part libraries. This allows you to edit and suggest changes/ideas along the design path.

KiCad is available on Windows, Mac, and Linux machines.

KiCad is in the Ubuntu Software Center.  This makes installing as easy as searching for “KiCad” selecting the install package, and click on install.  The software center prompts me to authenticate and I proceed with the install.  I also selected the English help file to download with the install. The version I installed is 2013-jul-07 Stable.

Ubuntu Studio places the KiCad Launcher in the Development menu folder. I ran it and got a dashboard for all the tools that come along with KiCad. This dashboard also helps manage projects.

Kicad Dashboard

There are tutorials linked to from the KiCad Website that I will be checking out this week.