Design testing for layout

I tested the battery charging circuit this week. It failed.  The lithium cell would charge, but when I disconnected the power adaptor everything shut down.  I didn’t understand how the enable lines worked.  In my hurry, I missed an example circuit in the datasheet that closely matched my needs. Most importantly it showed where to connect the enable lines for “normal” operation.

So for my client, I connected a diode from the out line of the chip to the in line of the chip(where the enables were connected to). The diode makes sure the out line is controlled by the chip and it can manage the current correctly.  Note D5 in the schematic below.


This works but it is kind of a hack.  Hacks are great for testing prototypes, doing one off designs, and temporary changes.  Hacks lead to problems in production, if at all possible hacks should be avoided on production runs.  The right way to connect this circuit for both the programmer and my client is to connect EN and ENO to the +5V rail and ENBAT to the battery positive terminal.  This configuration means that anytime power is connected to the power, it will supply system voltage from the +5V supply and charge the lithium cell with whatever current is left from the 450 ma I limited it to.  When the +5V rail is not powered, or under powered,the lithium cell supplies current to system.


I modified the code to connect the sigma delta to GPIO13 to drive the level shifter signal, then connected 5 Volts to the Vt and measured the waveform on the pad that corresponds with GPIO 13 through the level shifter. It didn’t work, Or the DSO138 oscilloscope can’t read the sigma delta signals.  I found a recommended power up sequence of the the level translator chip that I hadn’t considered before, the /OE pin should be brought low after power up.  This is to prevent excessive currents, I shouldn’t get the results I am seeing, I decided to try just toggling the GPIO12, 13, 14 pins controlled by the serial communications.  The system has gotten very unstable, I decided to re-flash the user config and wifi calibration data.  Turned out that Vt was/is shorted to ground, My best guess is the Pad directly under the chip solder bridged to the Vt(Vccb) pin of the level shifter chip.  Time to lay out again.

Do you have any Ideas or suggestions that might be useful for this design? Would you do anything differently?

Electronics design review (Hardware V00D)

The circuit is almost ready to go to layout again. This week I took a close look at the schematic design to look for errors and unfinished tasks.  By the way, you can put notes on a schematic to help you find anything you put off for later.

I have received the PCBs for my client, but I haven’t had the chance to populate the first one yet.  This means I haven’t had a chance to test the charging circuit yet. The availability of inexpensive PCB fabrication like OSH park has made a mini PCB test run reasonably priced.  You can now design a development board that exactly meets your requirements very inexpensively.  Since each iteration of the this design isn’t costing a lot, I am testing multiple changes each time. This allows me to work with devices that I am completely inexperienced at very low risk.

I started with the lithium cell charging circuit. I verified the input from the micro USB connector is tied to the input of the management chip.  I copied the timing and current limit device values from my client’s design.  The lithium cell (connector) is connected to GND and the dedicated pin on the management chip.  The status outputs are tied to LEDs so I have some indication of what is happening during charging. I may try to incorporate these signals later in the design. The system power output is connected to the 3.3V regulator which is working well on the two test boards I have already built.

Next I looked at the SPI RAM Chip select logic.  The transistor Q6 turns on when CS0 is low; this pulls the chip select line for U2 high preventing U2 from contending with the SPI bus when the flash chip is being accessed.  There is a diode blocking the high from pulling GPIO15 high during reset. There is a pull down resistor for when GPIO15 is low and CS0 is high to activate U2 chip select. This is untested but the design looks like it will work.  I chose 22K resistors for the pulldowns on GPIO15 and U2 chip select as a balance between current required when GPIO15 is high and the speed at which U2 chip select will fall when released.  Since I don’t know the amount of capacitance of that circuit, I may have to change that resistor value later.  Good place to put a note on the schematic.

U2 Schematic notes

The level shifter U3 is untested, I should test it before I go to layout. Another note.

I decided earlier that the voltage booster was working but needs to have an isolated ground on the PCB layout.  I have added an inductor between the boost GND and the system GND.  This allows for some experimentation.  I can just bridge the pads with solder, I can put a resistor in there, or I can install the inductor. If isolating the GND is enough, that’s great.  The resistor would help provide better filtering but could cause problems.  The inductor is best filtering but will slow down signal transitions of the high voltage. I also gave the net name GNDpp to the isolated GND.

Vpp GNDpp isolation

The transistor driver for VPP is untested, because I haven’t had the positive voltage available. I could have attached a 12 volt source and tested it but it’s a simple circuit. It should work. The analog switch is working, nothing to review with it.

Finally, the programming control pins RST and GPIO0. I am not happy with the resistor connections. I have decided to copy the design from the NodeMCU dev board.  It is simple and works well on the dev board.  The only thing I am concerned about here is how much current the UART bridge pulls when not connected to USB.

CH340 Crossslink

Use the GitHub link to get a current copy of this design. After testing, I will go to layout.

I would love to hear any questions or suggestions.  If you would do this differently, please comment.

Battery and charger (Hardware V00C)

Last week I worked on a client design including a lithium cell charger.  For that design, only a  LiPo cell would fit the size requirements. I started by copying the design from the work I had already done on that other project.  The lithium cell charger has a reference design in the datasheet, so I implemented it as described in the datasheet and then adjusted values for my application.

Re-using designs can save a lot of time.  Not only do you not have to read/understand a new datasheet and reference implementation, prototype level testing has already been done.  I haven’t actually done the prototype level testing yet, but I will for the client before I re-layout the programmer.

Then I realized maybe I didn’t want to use a lithium cell for the programmer.  The advantage of a lithium cell is power density, and a simple prismatic(3d rectangular) shape.  The disadvantages of a lithium cell are fire risks, and high costs in low quantities.

The alternative for a lithium cell is a battery of 3 or 4 NiMH cells. Three cells in series would be 3.6 Volts. Four would be 4.8V. The advantages of NiMH cells are consumer availability and price, very low safety risks, no special requirements for shipping. The disadvantages are more complex charging, very little drop in price for large quantities, cylindrical cells aren’t very efficient for space, lower power density.

I chose to go with a battery of NiMH cells.  I feel the consumer availability, price, and easier shipping are very significant advantages for the programmer.

Maximum charge voltage per cell is 1.78V. Multiply that by 4 cells is 7.12V(not optimal for charging over USB port). Multiply that by 3 cells is 5.34V (This is close to the 5V I would get from USB). Being a little under maximum charge voltage will still work but limit maximum charge current.  Since I want to charge off of the USB  connection, limiting it to 500mA(or 0.5 Amps) or 100mA is a good choice.

After looking at price and complexity of charger ICs, I changed my mind. I will go with the lithium cell and charger. I chose the resistor values to charge at approximately 500mA with a time limit of 8 hours.  The chip manages current flow to the system and charging the lithium cell at the same time.


I hope that you have found this blog of value, thank you for reading! I have uploaded the KiCad files to Use the link under the PI Gear logo to go get it.