Preparing for fabrication and population Hardware V00F

This week is about getting the files ready for ordering.  I thought about calling it Sometimes you have to do boring stuff II.  I’ve pushed an update to github so that fabrication files and the new BOM are available to download.

I started by running a BOM file from PCBnew.  I gave it a different name so that I could compare with the Last BOM. I opened the V00B file and then the new file called programmerV00F.  I set them up so I could see the differences.  There might be a good merge tool, but I don’t know of it.  Line by line I started going through the components.  Adding, removing, or updating each one. I deleted the lines that represented things that did not need to be ordered. This included the battery, mounting holes, and my logo. Once the obvious items had been taken care of, I went through it line by line and took counted my inventory of each item to make sure I had enough components to build one board.

I wrote the reference designator on each component bag as I went through the BOM.  This will save me time as I populate the PCB.  I found R5 in the BOM and I remembered I still need to experiment with it’s value, so I will pull it from a resistor kit. I skipped the charge indicator LEDs and their limiting resistors, I am not sure I want them yet. I changed my mind, I decided to get 5 each of the green and LEDs and I will use resistors out of my Resistor kit.

V00FDcartI ran the fabrication files to get gerber formatted layout files and the numerical drill file. I overwrote the older files because I knew that they were stored in a zip file. I then packaged them into a new zip file named  I did a quick review of the output files, and I am ready to order.

I’d love to hear what your thoughts are on this design.

Parts Placement (Hardware V00E)

With the design review and testing done, it is time to update the layout.  I started by doing a Design rules check on the schematic. I got 3 errors, two were passives connected to inputs.  I changed the analog input of U10 Pin 3 to a passive pin. This is not a problem, but might be in other circuits. The third indicated two power outputs were connected together.  The CH340G has a 3 volt pin that operates as either a power input (3.3v operation), or as an output (5v Operation), I went in and edited it to be a bidirectional pin.  It still gave me a warning, but it’s acceptable.

Design rule warnings and errors are important, for each one, I will check to make sure it doesn’t represent a real problem and try to fix it.

I then ran CvPCB to confirm all devices have an assigned footprint.  I had made some changes that means a few new components, and footprints. I got all the parts assigned and saved them. then saved the schematic sheet. I then ran a netlist. I opened the layout design, and imported the new netlist… it gave me an error. It couldn’t find the library Housings_SOT-23_SOT-143_TSOT-6. The library name had changed, I went back into CvPCB and found the TO_SOT_Packages_SMD library that had the SOT23 footprint that I needed for all of my transistors. After making reassigning the footprints, I re-saved CvPCB and the schematic file, then generated a new netlist.

This left me with a bunch of parts all jumbled together. I started by spreading them out so I could see their ratsnest better. Once I saw how much components needed to be moved around, I ripped up all traces as well as the ground plane.  This gives me the freedom to re-arrange the board more efficiently.  My strategy was to start at each end of the board and work to the middle.

Looking at the design, the switch for upload takes up a lot of space and is not needed. I went back into the schematic and removed the upload switch. This required that I generate a new netlist and read it into PCBnew.

I left the USB connector where it was, put the Lithium cell in the NW corner, the Reset circuit in the SW corner, the wifi module in the SE corner, The test header along the south edge, the target connector on the NE corner and the high voltage circuit along the north edge.


I routed the board using the interactive router. I then added my logo on to the board. I want to edit my logo a little bit, I may change that before I send the files off to fabrication.


The kicad files are on, use the link just below my logo to download them.

Do you have any comments, would you do something differently,  can you see a better placement of parts?

Electronics design review (Hardware V00D)

The circuit is almost ready to go to layout again. This week I took a close look at the schematic design to look for errors and unfinished tasks.  By the way, you can put notes on a schematic to help you find anything you put off for later.

I have received the PCBs for my client, but I haven’t had the chance to populate the first one yet.  This means I haven’t had a chance to test the charging circuit yet. The availability of inexpensive PCB fabrication like OSH park has made a mini PCB test run reasonably priced.  You can now design a development board that exactly meets your requirements very inexpensively.  Since each iteration of the this design isn’t costing a lot, I am testing multiple changes each time. This allows me to work with devices that I am completely inexperienced at very low risk.

I started with the lithium cell charging circuit. I verified the input from the micro USB connector is tied to the input of the management chip.  I copied the timing and current limit device values from my client’s design.  The lithium cell (connector) is connected to GND and the dedicated pin on the management chip.  The status outputs are tied to LEDs so I have some indication of what is happening during charging. I may try to incorporate these signals later in the design. The system power output is connected to the 3.3V regulator which is working well on the two test boards I have already built.

Next I looked at the SPI RAM Chip select logic.  The transistor Q6 turns on when CS0 is low; this pulls the chip select line for U2 high preventing U2 from contending with the SPI bus when the flash chip is being accessed.  There is a diode blocking the high from pulling GPIO15 high during reset. There is a pull down resistor for when GPIO15 is low and CS0 is high to activate U2 chip select. This is untested but the design looks like it will work.  I chose 22K resistors for the pulldowns on GPIO15 and U2 chip select as a balance between current required when GPIO15 is high and the speed at which U2 chip select will fall when released.  Since I don’t know the amount of capacitance of that circuit, I may have to change that resistor value later.  Good place to put a note on the schematic.

U2 Schematic notes

The level shifter U3 is untested, I should test it before I go to layout. Another note.

I decided earlier that the voltage booster was working but needs to have an isolated ground on the PCB layout.  I have added an inductor between the boost GND and the system GND.  This allows for some experimentation.  I can just bridge the pads with solder, I can put a resistor in there, or I can install the inductor. If isolating the GND is enough, that’s great.  The resistor would help provide better filtering but could cause problems.  The inductor is best filtering but will slow down signal transitions of the high voltage. I also gave the net name GNDpp to the isolated GND.

Vpp GNDpp isolation

The transistor driver for VPP is untested, because I haven’t had the positive voltage available. I could have attached a 12 volt source and tested it but it’s a simple circuit. It should work. The analog switch is working, nothing to review with it.

Finally, the programming control pins RST and GPIO0. I am not happy with the resistor connections. I have decided to copy the design from the NodeMCU dev board.  It is simple and works well on the dev board.  The only thing I am concerned about here is how much current the UART bridge pulls when not connected to USB.

CH340 Crossslink

Use the GitHub link to get a current copy of this design. After testing, I will go to layout.

I would love to hear any questions or suggestions.  If you would do this differently, please comment.

Associating parts to pinouts

I ran the annotate schematic tool, then ERC to look for obvious mistakes.

I got a bunch of errors because I had left pins unconnected.  This is a reminder that I have to make sure these pins are set to outputs later.  I marked each unconnected pin with a no connect marker and I am down to 3 errors. I replaced the battery connector with a battery symbol.  It didn’t get rid of the error, I will have to check this connection on the netlist.

I then ran the netlist tool with default settings.

Then I ran the CvPCB module of KiCAD. I assigned footprints to the parts from the schematic.  Most of these matched.  For resistors and capacitors, I chose to use 1206 SMD for the footprints.  There is no footprint for the ESP-12E.

I found a footprint online for the module, but KiCAD would not import it. So, I created a footprint and added it to the custom library for the project.

I chose the SW_PUSH_SMALL for the two tactile switches Reset and Upload.  These are through hole footprints, I am thinking I will copy this footprint to the custom library and modify it to go surface mount.

I have only done very simple layouts.  This will be quite a learning experience for me.

CvPCB 1st

KiCad EDA tools

I have never used the KiCad toolset.   The schematic capture tool I am familiar with is an older version of OrCad.  The industry tools have changed a lot, I expect a steep learning curve.

KiCad is open source, and free to use.  I will be posting my schematics, layout files, and new part libraries. This allows you to edit and suggest changes/ideas along the design path.

KiCad is available on Windows, Mac, and Linux machines.

KiCad is in the Ubuntu Software Center.  This makes installing as easy as searching for “KiCad” selecting the install package, and click on install.  The software center prompts me to authenticate and I proceed with the install.  I also selected the English help file to download with the install. The version I installed is 2013-jul-07 Stable.

Ubuntu Studio places the KiCad Launcher in the Development menu folder. I ran it and got a dashboard for all the tools that come along with KiCad. This dashboard also helps manage projects.

Kicad Dashboard

There are tutorials linked to from the KiCad Website that I will be checking out this week.